說明

• AD9525/PCBZ, Evaluation Board for the AD9525 clock generator. The AD9525 is designed to support converter clock requirements for long term evolution (LTE) and multicarrier GSM base station designs. The AD9525 provides a low power, multioutput, clock distribution function with low jitter performance, along with an on chip PLL that can be used with an external VCO or VCXO. The VCO input and eight LVPECL outputs can operate up to a frequency of 3.6 GHz. All outputs share a common divider that can provide a division of 1 to 6. The AD9525 offers a dedicated output that can be used to provide a programmable signal for resetting or synchronizing a data converter